EEE 329

VLSI Circuits I


  • CMOS VLSI Design: A Circuits and Systems Perspective [4th ed.]
    Authors: Neil H. E. Weste, David M. Harris

Course Rationale

This is a course which covers basic theories and techniques of digital VLSI design in CMOS technology. In this course, the students will study the fundamental concepts and structures of designing digital VLSI systems include CMOS devices and circuits, standard CMOS fabrication processes, CMOS design rules, static and dynamic logic structures, interconnect analysis, CMOS chip layout, simulation and testing, low power techniques, design tools and methodologies, VLSI architecture.


  • Ch. 1: Introduction
    • MOS Transistors
    • CMOS Logic: INV, NAND, NOR, Compound, Pass Transistors & Transmission Gates, Tristates, MUX, Sequential Circuits
    • Fabrication & Layout: INV Cross-Section, Fab Process, Layout Design Rules, Stick Diagrams
    • Design Partitioning: Design Abstractions, Structured Design, Gajski-Kuhn Chart
  • Ch. 2: MOS Transistor Theory
    • Long-Channel I-V Characteristics
    • C-V Characteristics: Simple MOS Capacitance
    • Nonideal I-V Effects: Mobility Degradation & Velocity Saturation, Channel Length Modulation, Threshold Voltage Effects, Leakage, Temperature & Geometry Dependence
    • DC Transfer Characteristics: Static CMOS INV, Beta Ratio, Noise Margin, Pass Transistor
  • Ch. 4: Delay
    • Transient Response
    • RC Delay Model: Effective Resistance, Gate & Diffusion Capacitance, Equivalent RC Circuits, Elmore Delay, Layout Dependence of Capacitance
    • Linear Delay Model: Logical Effort, Parasitic Delay
    • Logical Effort of Paths
  • Ch. 5: Power
    • Dynamic Power: Activity Factor, Capacitance, Voltage, Frequency, Short-Circuit Current, Resonant Circuits
    • Static Power: Static Power Sources, Power Gating, Multiple Threshold Voltages & Oxide Thicknesses, Variable Threshold Voltages, Input Vector Control
  • Ch. 7: Robustness
    • Variability: Supply Voltage, Temperature, Process Variation, Design Corners
    • Reliability: Oxide & Interconnect Wearout, Soft Errors, Overvoltage Failure, Latchup
    • Scaling: Transistor & Interconnect Scaling, ITRS, Impacts on Design
  • Ch. 9: Combinational Circuit Design
    • Circuit Families: Static CMOS, Ratioed Circuits, CVSL, Dynamic Circuits, Pass-Transistor Circuits

Course Outcome

  1. Demonstrate the basic operation of MOSFETs, different devices based on CMOS technology and fabrication process
  2. Analyze different types of devices based on various MOS technology, their circuit characteristics and performances
  3. Design various logic circuits using CMOS technology

Marks Distribution

  • Class Test (15%)
  • Assignment & Presentation (10%)
  • Attendance (5%)
  • Midterm Exam (30%)
  • Final Exam (40%)